[PATCH] D96972: [RISCV] Support insertion of misaligned subvectors

[Craig Topper via Phabricator via llvm-commits]

craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM other than that one question



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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:2265
+  SDLoc DL(Op);
+  auto OrigIdx = Op.getConstantOperandVal(2);
+  const RISCVRegisterInfo *TRI = Subtarget.getRegisterInfo();
----------------
Should this be unsigned instead of auto? I think getConstantOperandVal returns uint64_t but the rest of this code uses unsigned. I probably should have asked this question in the EXTRACT_SUBVECTOR patch.


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  https://reviews.llvm.org/D96972/new/

https://reviews.llvm.org/D96972