[PATCH] D97054: [MachineVerifier] Confirm that both ends of a tied def/use are live together

[Philip Reames via Phabricator via llvm-commits]

reames added a comment.

In D97054#2574843 <https://reviews.llvm.org/D97054#2574843>, @arsenm wrote:

> Testcase?

Not sure how to honestly.  The whole idea is that an invalid live range should be impossible to construct, but that we want to catch it in verification if the register allocator does so.

> I also think this won't handle subregister indexes correctly. How does the x86 test fail?

Can you expand on this a bit?  I'm not sure what you mean by handling subregisters.  What are the expectations for tied subregisters?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97054/new/

https://reviews.llvm.org/D97054