[PATCH] D97208: [X86] Always use rip-relative addressing on 64-bit when rematerializing all zeros/ones registers using a folded load.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 22 11:01:55 PST 2021
craig.topper created this revision.
craig.topper added reviewers: RKSimon, MaskRay, rnk, spatel, pengfei.
Herald added a subscriber: hiraditya.
craig.topper requested review of this revision.
Herald added a project: LLVM.
Previously we only used RIP relative when PIC was enabled. But
we know we're in small/kernel code model here so we should
be able to always use RIP-relative which will give a smaller
encoding.
None of our lit tests are affected by this for some reason. Maybe the
update_test_checks.py is too aggressive with regular expressions?
I'll work on a proper test before committing, but I wanted to make
sure I wasn't missing anything that would prevent us from making this
change.
Here's a godbolt link that demonstrates the current codegen https://godbolt.org/z/j3158o
Note in the non-PIC version the load from .LCPI0_0 doesn't use
RIP-relative addressing, but if you change the constant in the
source from 0.0 to 1.0 it will become RIP-relative.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D97208
Files:
llvm/lib/Target/X86/X86InstrInfo.cpp
Index: llvm/lib/Target/X86/X86InstrInfo.cpp
===================================================================
--- llvm/lib/Target/X86/X86InstrInfo.cpp
+++ llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -6084,15 +6084,16 @@
// x86-32 PIC requires a PIC base register for constant pools.
unsigned PICBase = 0;
- if (MF.getTarget().isPositionIndependent()) {
- if (Subtarget.is64Bit())
- PICBase = X86::RIP;
- else
- // FIXME: PICBase = getGlobalBaseReg(&MF);
- // This doesn't work for several reasons.
- // 1. GlobalBaseReg may have been spilled.
- // 2. It may not be live at MI.
- return nullptr;
+ // Since we're using Small or Kernel code model, we can always use
+ // RIP-relative addressing for a smaller encoding.
+ if (Subtarget.is64Bit()) {
+ PICBase = X86::RIP;
+ } else if (MF.getTarget().isPositionIndependent()) {
+ // FIXME: PICBase = getGlobalBaseReg(&MF);
+ // This doesn't work for several reasons.
+ // 1. GlobalBaseReg may have been spilled.
+ // 2. It may not be live at MI.
+ return nullptr;
}
// Create a constant-pool entry.
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