[PATCH] D96416: [TableGen] Improve algorithms for processing template arguments; add type checking

[Paul C. Anagnostopoulos via Phabricator via llvm-commits]

Paul-C-Anagnostopoulos added a subscriber: t.p.northover.
Paul-C-Anagnostopoulos added a comment.

@t.p.northover

I think the Clang problem might be in this code in arm_mve.td.  I've flagged 'top', which is a bit. However, EmitterBase::getCodeForDagArg (in MveEmiiter.cpp) does not handle a bit as argument #2 of this DAG. At least, that's what I gather. I have improved the error message that it produces, which is shown below the code. What I don't understand is why this revision suddenly produces an error where none was produced before. I'll continue to investigate.

  multiclass vmovl<bit top> {
    let params = [s8, u8, s16, u16] in {
      def "": Intrinsic<DblVector, (args Vector:$a),
        (extend (unzip $a, top), DblVector, (unsignedflag Scalar))>;
      defm "": IntrinsicMX<DblVector, (args Vector:$a, DblPredicate:$pred),
          (IRInt<"vmovl_predicated", [DblVector, Vector, DblPredicate]>
           $a, (unsignedflag Scalar), **top**, $pred, $inactive)>;
    }
  }
  
  error: bad DAG argument type for code generation
  note: DAG: (anonymous_336 ?:$a, (unsignedflag Scalar), 0, ?:$pred, ?:$inactive)
  note: argument type: bit
  note: argument number 2: 0
  PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.


Repository:
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