[PATCH] D97035: [AArch64][GlobalISel] Support lowering <1 x i8> arguments

Jessica Paquette via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 22 09:20:45 PST 2021


paquette accepted this revision.
paquette added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: llvm/lib/CodeGen/GlobalISel/CallLowering.cpp:551
+          LLVM_DEBUG(dbgs() << "Incoming promoted vector arg elts is not a "
+                               "multiple of orig type elt");
           return false;
----------------
Would it be useful to include the number of elements + number of original elements in this debug output?


================
Comment at: llvm/lib/CodeGen/GlobalISel/CallLowering.cpp:555
+        SmallVector<Register, 4> DstRegs = {ArgReg};
+        unsigned NumParts =
+            VATy.getNumElements() / OrigVT.getVectorNumElements();
----------------
Nit: Might as well make this `NumParts - 1`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97035/new/

https://reviews.llvm.org/D97035



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