[llvm] c11fd0d - [VPlan] Skip VPWidenPHIRecipe in VPInterleavedACcessInfo.
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 22 02:35:28 PST 2021
Author: Florian Hahn
Date: 2021-02-22T10:35:09Z
New Revision: c11fd0df64290ed12dbee0617588b1d17a9d5d10
URL: https://github.com/llvm/llvm-project/commit/c11fd0df64290ed12dbee0617588b1d17a9d5d10
DIFF: https://github.com/llvm/llvm-project/commit/c11fd0df64290ed12dbee0617588b1d17a9d5d10.diff
LOG: [VPlan] Skip VPWidenPHIRecipe in VPInterleavedACcessInfo.
Update unit tests that did not expect VPWidenPHIRecipes after
15a74b64dfa9.
Added:
Modified:
llvm/lib/Transforms/Vectorize/VPlan.cpp
llvm/lib/Transforms/Vectorize/VPlanSLP.cpp
llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Vectorize/VPlan.cpp b/llvm/lib/Transforms/Vectorize/VPlan.cpp
index 973f165359dd..d7fcba41cf35 100644
--- a/llvm/lib/Transforms/Vectorize/VPlan.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlan.cpp
@@ -1039,6 +1039,8 @@ void VPInterleavedAccessInfo::visitBlock(VPBlockBase *Block, Old2NewTy &Old2New,
InterleavedAccessInfo &IAI) {
if (VPBasicBlock *VPBB = dyn_cast<VPBasicBlock>(Block)) {
for (VPRecipeBase &VPI : *VPBB) {
+ if (isa<VPWidenPHIRecipe>(&VPI))
+ continue;
assert(isa<VPInstruction>(&VPI) && "Can only handle VPInstructions");
auto *VPInst = cast<VPInstruction>(&VPI);
auto *Inst = cast<Instruction>(VPInst->getUnderlyingValue());
diff --git a/llvm/lib/Transforms/Vectorize/VPlanSLP.cpp b/llvm/lib/Transforms/Vectorize/VPlanSLP.cpp
index 6f21bf44291a..39c879d45647 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanSLP.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanSLP.cpp
@@ -122,7 +122,9 @@ bool VPlanSlp::areVectorizable(ArrayRef<VPValue *> Operands) const {
unsigned LoadsSeen = 0;
VPBasicBlock *Parent = cast<VPInstruction>(Operands[0])->getParent();
for (auto &I : *Parent) {
- auto *VPI = cast<VPInstruction>(&I);
+ auto *VPI = dyn_cast<VPInstruction>(&I);
+ if (!VPI)
+ break;
if (VPI->getOpcode() == Instruction::Load &&
llvm::is_contained(Operands, VPI))
LoadsSeen++;
diff --git a/llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp b/llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
index dfa3d0ee7332..b19fdbd16661 100644
--- a/llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
+++ b/llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
@@ -54,8 +54,8 @@ TEST_F(VPlanHCFGTest, testBuildHCFGInnerLoop) {
EXPECT_EQ(&*Plan, VecBB->getPlan());
auto Iter = VecBB->begin();
- VPInstruction *Phi = dyn_cast<VPInstruction>(&*Iter++);
- EXPECT_EQ(Instruction::PHI, Phi->getOpcode());
+ VPWidenPHIRecipe *Phi = dyn_cast<VPWidenPHIRecipe>(&*Iter++);
+ EXPECT_NE(nullptr, Phi);
VPInstruction *Idx = dyn_cast<VPInstruction>(&*Iter++);
EXPECT_EQ(Instruction::GetElementPtr, Idx->getOpcode());
@@ -108,7 +108,7 @@ compound=true
N1 -> N2 [ label=""]
N2 [label =
"for.body:\n" +
- "EMIT ir<%indvars.iv> = phi ir<0> ir<%indvars.iv.next>\l" +
+ "WIDEN-PHI %indvars.iv = phi 0, %indvars.iv.next\l" +
"EMIT ir<%arr.idx> = getelementptr ir<%A> ir<%indvars.iv>\l" +
"EMIT ir<%l1> = load ir<%arr.idx>\l" +
"EMIT ir<%res> = add ir<%l1> ir<10>\l" +
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