[PATCH] D97181: [LegalizeIntegerTypes] Improve ExpandIntRes_SADDSUBO codegen on targets without SADDO/SSUBO.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel, efriedma, luismarques.
Herald added subscribers: frasercrmck, apazos, sameer.abuasal, s.egerton, dmgreen, Jim, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya.
craig.topper requested review of this revision.
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This code creates 3 setccs that need to be expanded. It was
creating a sign bit test as setge X, 0 which is non-canonical.
Canonical would be setgt X, -1. This misses the special case in
IntegerExpandSetCCOperands for sign bit tests that assumes
canonical form. If we don't hit this special case we end up
with a multipart setcc instead of just checking the sign of
the high part.

To fix this I've reversed the polarity of all of the setccs to
setlt X, 0 which is canonical. The rest of the logic should
still work. This seems to produce better code on RISCV which
lacks a setgt instruction.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D97181

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
  llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
  llvm/test/CodeGen/ARM/sadd_sat.ll
  llvm/test/CodeGen/ARM/sadd_sat_plus.ll
  llvm/test/CodeGen/ARM/ssub_sat.ll
  llvm/test/CodeGen/ARM/ssub_sat_plus.ll
  llvm/test/CodeGen/RISCV/sadd_sat.ll
  llvm/test/CodeGen/RISCV/sadd_sat_plus.ll
  llvm/test/CodeGen/RISCV/ssub_sat.ll
  llvm/test/CodeGen/RISCV/ssub_sat_plus.ll
  llvm/test/CodeGen/RISCV/xaluo.ll
  llvm/test/CodeGen/Thumb2/mve-saturating-arith.ll

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