[PATCH] D75016: [X86][TwoAddressInstructionPass] Teach tryInstructionCommute to continue checking for commutable FMA operands in more cases.

Chris Elrod via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Feb 21 23:16:52 PST 2021


chriselrod added a comment.
Herald added a subscriber: pengfei.

I'm still seeing this for a complex dot product on LLVM 11.0.1. Godbolt example <https://godbolt.org/z/z53fzP>

  llvm
  L61:                                              ; preds = %L61, %L30.preheader
    %value_phi20178 = phi <8 x double> [ %res.i118, %L61 ], [ zeroinitializer, %L30.preheader ]
    %value_phi19177 = phi <8 x double> [ %res.i119, %L61 ], [ zeroinitializer, %L30.preheader ]
    %value_phi16176 = phi <8 x double> [ %res.i124, %L61 ], [ zeroinitializer, %L30.preheader ]
    %value_phi15175 = phi <8 x double> [ %res.i125, %L61 ], [ zeroinitializer, %L30.preheader ]
    %value_phi9174 = phi i64 [ %ptr.2.i114, %L61 ], [ %11, %L30.preheader ]
    %value_phi173 = phi i64 [ %ptr.2.i117, %L61 ], [ %10, %L30.preheader ]
    %ptr.1.i148 = inttoptr i64 %value_phi173 to <16 x double>*
    %res.i149 = load <16 x double>, <16 x double>* %ptr.1.i148, align 8
    %res.i147 = shufflevector <16 x double> %res.i149, <16 x double> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
    %res.i146 = shufflevector <16 x double> %res.i149, <16 x double> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
    %ptr.0.i143 = inttoptr i64 %value_phi173 to double*
    %ptr.1.i144 = getelementptr inbounds double, double* %ptr.0.i143, i64 16
    %ptr.1.i141 = bitcast double* %ptr.1.i144 to <16 x double>*
    %res.i142 = load <16 x double>, <16 x double>* %ptr.1.i141, align 8
    %res.i140 = shufflevector <16 x double> %res.i142, <16 x double> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
    %res.i139 = shufflevector <16 x double> %res.i142, <16 x double> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
    %ptr.1.i137 = inttoptr i64 %value_phi9174 to <16 x double>*
    %res.i138 = load <16 x double>, <16 x double>* %ptr.1.i137, align 8
    %res.i136 = shufflevector <16 x double> %res.i138, <16 x double> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
    %res.i135 = shufflevector <16 x double> %res.i138, <16 x double> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
    %ptr.0.i132 = inttoptr i64 %value_phi9174 to double*
    %ptr.1.i133 = getelementptr inbounds double, double* %ptr.0.i132, i64 16
    %ptr.1.i130 = bitcast double* %ptr.1.i133 to <16 x double>*
    %res.i131 = load <16 x double>, <16 x double>* %ptr.1.i130, align 8
    %res.i129 = shufflevector <16 x double> %res.i131, <16 x double> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
    %res.i128 = shufflevector <16 x double> %res.i131, <16 x double> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
    %res.i127 = call nsz contract <8 x double> @llvm.fma.v8f64(<8 x double> %res.i146, <8 x double> %res.i135, <8 x double> %value_phi15175)
    %res.i126 = call nsz contract <8 x double> @llvm.fma.v8f64(<8 x double> %res.i139, <8 x double> %res.i128, <8 x double> %value_phi16176)
    %res.i125 = call nsz contract <8 x double> @llvm.fma.v8f64(<8 x double> %res.i147, <8 x double> %res.i136, <8 x double> %res.i127)
    %res.i124 = call nsz contract <8 x double> @llvm.fma.v8f64(<8 x double> %res.i140, <8 x double> %res.i129, <8 x double> %res.i126)
    %res.i123 = fneg nsz contract <8 x double> %res.i146
    %res.i122 = call nsz contract <8 x double> @llvm.fma.v8f64(<8 x double> %res.i123, <8 x double> %res.i136, <8 x double> %value_phi19177)
    %res.i121 = fneg nsz contract <8 x double> %res.i139
    %res.i120 = call nsz contract <8 x double> @llvm.fma.v8f64(<8 x double> %res.i121, <8 x double> %res.i129, <8 x double> %value_phi20178)
    %res.i119 = call nsz contract <8 x double> @llvm.fma.v8f64(<8 x double> %res.i147, <8 x double> %res.i135, <8 x double> %res.i122)
    %res.i118 = call nsz contract <8 x double> @llvm.fma.v8f64(<8 x double> %res.i140, <8 x double> %res.i128, <8 x double> %res.i120)
    %ptr.1.i116 = getelementptr inbounds double, double* %ptr.0.i143, i64 32
    %ptr.2.i117 = ptrtoint double* %ptr.1.i116 to i64
    %ptr.1.i113 = getelementptr inbounds double, double* %ptr.0.i132, i64 32
    %ptr.2.i114 = ptrtoint double* %ptr.1.i113 to i64
    %.not = icmp ugt double* %ptr.1.i116, %ptr.1.i157
    br i1 %.not, label %L88, label %L61



  asm
  .LBB0_5:                                # %L61
          vmovupd zmm8, zmmword ptr [rsi]
          vmovupd zmm6, zmmword ptr [rsi + 64]
          vmovupd zmm9, zmmword ptr [rsi + 128]
          vmovupd zmm7, zmmword ptr [rsi + 192]
          vmovapd zmm10, zmm8
          vpermt2pd       zmm10, zmm2, zmm6
          vpermt2pd       zmm8, zmm3, zmm6
          vmovapd zmm11, zmm9
          vpermt2pd       zmm11, zmm2, zmm7
          vmovupd zmm12, zmmword ptr [rdx]
          vmovupd zmm13, zmmword ptr [rdx + 64]
          vmovupd zmm14, zmmword ptr [rdx + 128]
          vpermt2pd       zmm9, zmm3, zmm7
          vmovupd zmm15, zmmword ptr [rdx + 192]
          vmovapd zmm6, zmm12
          vpermt2pd       zmm6, zmm2, zmm13
          vpermt2pd       zmm12, zmm3, zmm13
          vmovapd zmm7, zmm14
          vpermt2pd       zmm7, zmm2, zmm15
          vpermt2pd       zmm14, zmm3, zmm15
          vfmadd231pd     zmm0, zmm8, zmm12       # zmm0 = (zmm8 * zmm12) + zmm0
          vfmadd231pd     zmm1, zmm9, zmm14       # zmm1 = (zmm9 * zmm14) + zmm1
          vfmadd231pd     zmm0, zmm10, zmm6       # zmm0 = (zmm10 * zmm6) + zmm0
          vfmadd231pd     zmm1, zmm11, zmm7       # zmm1 = (zmm11 * zmm7) + zmm1
          vfmsub213pd     zmm6, zmm8, zmm5        # zmm6 = (zmm8 * zmm6) - zmm5
          vfmsub213pd     zmm7, zmm9, zmm4        # zmm7 = (zmm9 * zmm7) - zmm4
          vfmsub231pd     zmm6, zmm10, zmm12      # zmm6 = (zmm10 * zmm12) - zmm6
          vfmsub231pd     zmm7, zmm11, zmm14      # zmm7 = (zmm11 * zmm14) - zmm7
          add     rsi, 256
          add     rdx, 256
          vmovapd zmm4, zmm7
          vmovapd zmm5, zmm6
          cmp     rsi, r11
          jbe     .LBB0_5

Note the

  asm
          vfmsub213pd     zmm6, zmm8, zmm5        # zmm6 = (zmm8 * zmm6) - zmm5
          vfmsub213pd     zmm7, zmm9, zmm4        # zmm7 = (zmm9 * zmm7) - zmm4
          vfmsub231pd     zmm6, zmm10, zmm12      # zmm6 = (zmm10 * zmm12) - zmm6
          vfmsub231pd     zmm7, zmm11, zmm14      # zmm7 = (zmm11 * zmm14) - zmm7
  # ...
          vmovapd zmm4, zmm7
          vmovapd zmm5, zmm6


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75016/new/

https://reviews.llvm.org/D75016



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