[PATCH] D97171: [AVR] Fix operands for ASRW8Rd
Ayke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Feb 21 16:47:49 PST 2021
aykevl created this revision.
aykevl added reviewers: dylanmckay, benshi001.
Herald added subscribers: Jim, hiraditya.
aykevl requested review of this revision.
Herald added a project: LLVM.
The second (instead of the first) operand was set as the definition for the `ADDRdRr` instruction.
This issue was flagged by the machine verifier.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D97171
Files:
llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
Index: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
===================================================================
--- llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
+++ llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
@@ -1733,8 +1733,9 @@
.addReg(DstHiReg);
// Move the sign bit to the C flag.
- buildMI(MBB, MBBI, AVR::ADDRdRr).addReg(DstHiReg)
- .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead))
+ buildMI(MBB, MBBI, AVR::ADDRdRr)
+ .addReg(DstHiReg, RegState::Define, getDeadRegState(DstIsDead))
+ .addReg(DstHiReg, getKillRegState(DstIsKill) | getDeadRegState(DstIsDead))
.addReg(DstHiReg, getKillRegState(DstIsKill));
// Set upper byte to 0 or -1.
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