[PATCH] D97163: [GlobalISel] Implement fewerElements legalization for vector reductions.

Amara Emerson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Feb 21 14:22:26 PST 2021


aemerson created this revision.
aemerson added reviewers: paquette, arsenm, nikic.
aemerson added a project: LLVM.
Herald added subscribers: hiraditya, rovka.
aemerson requested review of this revision.
Herald added a subscriber: wdng.

This patch adds 3 methods, one for power-of-2 vectors which use tree reductions using vector ops, before a final reduction op. For non-pow-2 types it generates multiple narrow reductions and combines the values with scalar ops.

The vabs test is modified because fixing some fallback results in an unintended match.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D97163

Files:
  llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
  llvm/include/llvm/CodeGen/GlobalISel/Utils.h
  llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-add.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-fadd.mir
  llvm/test/CodeGen/AArch64/arm64-vabs.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D97163.325339.patch
Type: text/x-patch
Size: 15637 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210221/85835f84/attachment.bin>


More information about the llvm-commits mailing list