[llvm] e7e35e1 - [X86] Regenerate sub.ll test

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2021-02-21T21:25:26Z
New Revision: e7e35e17584a8c31fddd5382aabdbb08114642ff

URL: https://github.com/llvm/llvm-project/commit/e7e35e17584a8c31fddd5382aabdbb08114642ff
DIFF: https://github.com/llvm/llvm-project/commit/e7e35e17584a8c31fddd5382aabdbb08114642ff.diff

LOG: [X86] Regenerate sub.ll test

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/sub.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/sub.ll b/llvm/test/CodeGen/X86/sub.ll
index 3251cb606802..55f9ef98ca79 100644
--- a/llvm/test/CodeGen/X86/sub.ll
+++ b/llvm/test/CodeGen/X86/sub.ll
@@ -1,11 +1,14 @@
-; RUN: llc -mtriple=i686-- < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
 
 define i32 @test1(i32 %x) {
+; CHECK-LABEL: test1:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    xorl $-32, %eax
+; CHECK-NEXT:    addl $33, %eax
+; CHECK-NEXT:    retl
   %xor = xor i32 %x, 31
   %sub = sub i32 32, %xor
   ret i32 %sub
-; CHECK-LABEL: test1:
-; CHECK:      xorl $-32
-; CHECK-NEXT: addl $33
-; CHECK-NEXT: ret
 }