[llvm] 0b372c0 - [X86] Add common CHECK check-prefix to sub combine tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Feb 21 13:11:19 PST 2021
Author: Simon Pilgrim
Date: 2021-02-21T21:10:52Z
New Revision: 0b372c029e4ac3af500c04a8954612ec4a0257a7
URL: https://github.com/llvm/llvm-project/commit/0b372c029e4ac3af500c04a8954612ec4a0257a7
DIFF: https://github.com/llvm/llvm-project/commit/0b372c029e4ac3af500c04a8954612ec4a0257a7.diff
LOG: [X86] Add common CHECK check-prefix to sub combine tests
Added:
Modified:
llvm/test/CodeGen/X86/combine-sub.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/combine-sub.ll b/llvm/test/CodeGen/X86/combine-sub.ll
index df5aba0f26cf..935926cf50b2 100644
--- a/llvm/test/CodeGen/X86/combine-sub.ll
+++ b/llvm/test/CodeGen/X86/combine-sub.ll
@@ -1,16 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
; fold (sub x, 0) -> x
define <4 x i32> @combine_vec_sub_zero(<4 x i32> %a) {
-; SSE-LABEL: combine_vec_sub_zero:
-; SSE: # %bb.0:
-; SSE-NEXT: retq
-;
-; AVX-LABEL: combine_vec_sub_zero:
-; AVX: # %bb.0:
-; AVX-NEXT: retq
+; CHECK-LABEL: combine_vec_sub_zero:
+; CHECK: # %bb.0:
+; CHECK-NEXT: retq
%1 = sub <4 x i32> %a, zeroinitializer
ret <4 x i32> %1
}
@@ -96,13 +92,9 @@ define <4 x i32> @combine_vec_sub_add0(<4 x i32> %a, <4 x i32> %b) {
; fold (A+B)-B -> A
define <4 x i32> @combine_vec_sub_add1(<4 x i32> %a, <4 x i32> %b) {
-; SSE-LABEL: combine_vec_sub_add1:
-; SSE: # %bb.0:
-; SSE-NEXT: retq
-;
-; AVX-LABEL: combine_vec_sub_add1:
-; AVX: # %bb.0:
-; AVX-NEXT: retq
+; CHECK-LABEL: combine_vec_sub_add1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: retq
%1 = add <4 x i32> %a, %b
%2 = sub <4 x i32> %1, %b
ret <4 x i32> %2
@@ -180,26 +172,18 @@ define <4 x i32> @combine_vec_sub_sub_sub(<4 x i32> %a, <4 x i32> %b, <4 x i32>
; fold undef-A -> undef
define <4 x i32> @combine_vec_sub_undef0(<4 x i32> %a) {
-; SSE-LABEL: combine_vec_sub_undef0:
-; SSE: # %bb.0:
-; SSE-NEXT: retq
-;
-; AVX-LABEL: combine_vec_sub_undef0:
-; AVX: # %bb.0:
-; AVX-NEXT: retq
+; CHECK-LABEL: combine_vec_sub_undef0:
+; CHECK: # %bb.0:
+; CHECK-NEXT: retq
%1 = sub <4 x i32> undef, %a
ret <4 x i32> %1
}
; fold A-undef -> undef
define <4 x i32> @combine_vec_sub_undef1(<4 x i32> %a) {
-; SSE-LABEL: combine_vec_sub_undef1:
-; SSE: # %bb.0:
-; SSE-NEXT: retq
-;
-; AVX-LABEL: combine_vec_sub_undef1:
-; AVX: # %bb.0:
-; AVX-NEXT: retq
+; CHECK-LABEL: combine_vec_sub_undef1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: retq
%1 = sub <4 x i32> %a, undef
ret <4 x i32> %1
}
More information about the llvm-commits
mailing list