[PATCH] D96972: [RISCV] Support insertion of misaligned subvectors

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added a comment.

Sadly this regresses some of the fixed-length tests. Because `INSERT_SUBVECTOR` is now "custom" (not "legal") it doesn't fold bitcasts around the operation:

  Vector/type-legalized selection DAG: %bb.0 'mulhs_vx_v2i64:'
                  t27: v4i32 = BUILD_VECTOR Constant:i32<63>, Constant:i32<0>, Constant:i32<63>, Constant:i32<0>
                t28: v2i64 = bitcast t27
              t40: nxv1i64 = insert_subvector undef:nxv1i64, t28, Constant:i32<0>

it used to perform this dag-combine:

  Optimized vector-legalized selection DAG: %bb.0 'mulhs_vx_v2i64:'
                  t27: v4i32 = BUILD_VECTOR Constant:i32<63>, Constant:i32<0>, Constant:i32<63>, Constant:i32<0>
                t46: nxv2i32 = insert_subvector undef:nxv2i32, t27, Constant:i32<0>
              t47: nxv1i64 = bitcast t46

which for scalable vectors is a no-op, but for fixed-length vectors it still goes through the stack.

Sounds like there's a sort-of dependency on supporting fixed-length bitcasts before we can merge this. @craig.topper, I don't suppose you're looking into it?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D96972/new/

https://reviews.llvm.org/D96972