[PATCH] D96972: [RISCV] Support insertion of misaligned subvectors

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck updated this revision to Diff 324935.
frasercrmck added a comment.

- rebase
- add float vectors
- lower simply VSLIDEUP of LMUL=1 type (no VSLIDEDOWNs)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96972/new/

https://reviews.llvm.org/D96972

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll

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