[PATCH] D96957: [AVR] Fix rotate instructions
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 18 19:37:42 PST 2021
benshi001 added a comment.
Also, there are lint errors, I think this patch is OK if all lint errors can be fixed.
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Comment at: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp:1349
+ .addReg(DstReg)
+ .addImm(7);
----------------
BLD has a implict SREG operand, do we need to set it as killed?
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Comment at: llvm/lib/Target/AVR/AVRInstrInfo.td:1753
+ // 8-bit ROL is an alias of ADC Rd, Rd
+
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remove this comment line? It is incorrect.
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Comment at: llvm/test/CodeGen/AVR/rot.ll:40
; CHECK-NEXT: .LBB1_1:
- ; CHECK-NEXT: lsr r24
- ; CHECK-NEXT: ldi r0, 0
- ; CHECK-NEXT: ror r0
- ; CHECK-NEXT: or r24, r0
+ ; CHECK-NEXT: bst r24, 0
+ ; CHECK-NEXT: ror r24
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use llvm/utils/update_llc_test_checks.py to update instruction pattern?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D96957/new/
https://reviews.llvm.org/D96957
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