[PATCH] D95432: AMDGPU/GlobalISel: Combine uniform icmp

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D95432#2573420 <https://reviews.llvm.org/D95432#2573420>, @arsenm wrote:

> Actually, why is this patch necessary? The ZEXT+TRUNC handling takes care of this already?

Oh right, the problem here is actually the intermediate SCC copies produced as a selection artifact.

I'm not sure treating this as a combine is the correct way to go about this. The DAG handles this with a scheduler to minimize physical register liveranges. We might be better treating this off as a scheduling issue for after selection, when we directly see the SCC defs.


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https://reviews.llvm.org/D95432