[PATCH] D96517: [AMDGPU] Optimize SGPR to scratch spilling

[Michael Liao via Phabricator via llvm-commits]

hliao added a comment.

Shall we optimize the cases where only 1 or 2 SGPRs are to be spilled or reloaded when there's a VGPR scavenged? In this case, we only need one or two loads/stores to spill/reload that SGPR. From the number of LD/ST, that original one (based on broadcast and v_readfirstlane) is still OK but we need less code.


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https://reviews.llvm.org/D96517