[PATCH] D96961: [AArch64][SVE][DAGCombine] Factor out redundant SVE mul/fmul intrinsics

[Joe Ellis via Phabricator via llvm-commits]

joechrisellis created this revision.
joechrisellis added reviewers: huntergr, peterwaller-arm, bsmith.
Herald added subscribers: psnobl, hiraditya, kristof.beyls, tschuett.
Herald added a reviewer: efriedma.
joechrisellis requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

This commit implements the following patterns:

  fmul (ptrue sv_all) (dup 1.0) V => V
  fmul (ptrue sv_all) V (dup 1.0) => V
  mul (ptrue sv_all) (dup 1) V => V
  mul (ptrue sv_all) V (dup 1) => V

That is: using the SVE mul/fmul intrinsic with an all-true predicate to
multiply a vector X by a vector of all ones is redundant.

The result of this commit is that code such as:

  1  #include <arm_sve.h>
  2
  3  svfloat64_t foo(svfloat64_t a) {
  4    svbool_t t = svptrue_b64();
  5    svfloat64_t b = svdup_f64(1.0);
  6    return svmul_m(t, a, b);
  7  }

will compile to a nop.

This commit does not capture all possibilities; only the simple case as
described above. There is still room for further optimisation.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D96961

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-mul-fmul-idempotency.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D96961.324646.patch
Type: text/x-patch
Size: 11354 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210218/62efd1a0/attachment.bin>