[PATCH] D96639: [AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn

[Tony Tye via Phabricator via llvm-commits]

t-tye added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp:115
     return false;
-  if (AMDGPU::getAtomicNoRetOp(MI.getOpcode()) != -1 ||
-      AMDGPU::getAtomicRetOp(MI.getOpcode()) != -1)
+  if (SIInstrInfo::isAtomic(MI))
     return false;
----------------
rampitec wrote:
> foad wrote:
> > I think this is dead too since it is covered by the mayStore just above.
> There are atomic loads. Although these are not marked as atomics, which may be a problem. As far as I understand this is just a load with glc.
> There are atomic loads. Although these are not marked as atomics, which may be a problem. As far as I understand this is just a load with glc.

Not all atomics are read-modify-write. There are atomics loads, atmic stores, and rmw atomics that do not consume the result.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96639/new/

https://reviews.llvm.org/D96639