[PATCH] D96381: [AArch64] Adding SHA3 Intrinsics support

[Ana Pazos via Phabricator via llvm-commits]

apazos added a comment.

This looks like a straightforward implementation. The only caveat is that the XAR immediate does not represent a lane, and hence the need for a custom immediate range check. Looks sensible to me.
@labrinea   and others at ARM, do have any other comment before this is merged?


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https://reviews.llvm.org/D96381