[PATCH] D96405: [DAGCombiner] Improve reduceBuildVecToShuffle Performance

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

This doesn't seem like the right direction,
i'd expect that to be a new fold to reduce shuffle count,
because if we only teach some existing fold to do this,
we'll miss such shuffle patterns that appear via other means.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96405/new/

https://reviews.llvm.org/D96405