[PATCH] D94949: [AArch64][RegAllocFast] Add findSpillBefore to TargetRegisterInfo
Tomas Matheson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 16 02:43:45 PST 2021
tmatheson marked 3 inline comments as done.
tmatheson added inline comments.
================
Comment at: llvm/lib/Target/ARM/ARMRegisterInfo.cpp:25
+MachineBasicBlock::iterator
+ARMRegisterInfo::findSpillBefore(MachineInstr &MI) const {
+ auto IsExclusiveLoad = [](const MachineInstr &MI) -> Optional<unsigned> {
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mtrofin wrote:
> how similar are the 2 implementations - the one in AArch64RegisterInfo and here? Can there be some factoring to improve maintainability?
I have moved the common code into a common base class in the updated version.
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https://reviews.llvm.org/D94949/new/
https://reviews.llvm.org/D94949
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