[PATCH] D96700: [llvm][Aarch64][SVE] Remove extra fmov instruction with certain literals

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm requested changes to this revision.
paulwalker-arm added inline comments.
This revision now requires changes to proceed.


================
Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:566-567
+            (DUP_ZR_D (MOVi64imm (bitcast_fpimm_to_i64 f64:$val)))>;
+ def : Pat<(nxv4f64 (AArch64dup (f64 fpimm:$val))),
+            (DUP_ZR_D (MOVi64imm (bitcast_fpimm_to_i64 f64:$val)))>;
+
----------------
`nxv4f64` is not a legal type and thus this pattern will have no affect.


================
Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-dup-x.ll:157-164
+define <vscale x 4 x double> @dup_fmov_imm_f64_4() {
+; CHECK-LABEL: dup_fmov_imm_f64_4:
+; CHECK: mov x8, #4631107791820423168
+; CHECK-NEXT: mov z0.d, x8
+  %out = tail call <vscale x 4 x double> @llvm.aarch64.sve.dup.x.nxv4f64(double 4.200000e+01)
+  ret <vscale x 4 x double> %out
+}
----------------
Whilst I can begrudgingly accept the `vscale x 2 x float` test, this `vscale x 4 x double` test should definite be removed as it is not linked to any of the new patterns.


================
Comment at: llvm/test/CodeGen/AArch64/sve-vector-splat.ll:404-405
+; CHECK-LABEL: splat_nxv4f64_fmov_fold
+; CHECK: mov x8, #4631107791820423168
+; CHECK-NEXT: mov z0.d, x8
+  %1 = insertelement <vscale x 4 x double> undef, double 4.200000e+01, i32 0
----------------
I'd remove this test also, but if you keep it then the CHECK lines need updating as `<vscale x 4 x double>` sits across two registers.  Personally I just remove it as it's not testing anything that is not already tested by splat_nxv2f64_fmov_fold.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96700/new/

https://reviews.llvm.org/D96700