[PATCH] D96700: [llvm][Aarch64][SVE] Remove extra fmov instruction with certain literals

[David Truby via Phabricator via llvm-commits]

DavidTruby added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-dup-x.ll:133-139
+define <vscale x 2 x float> @dup_fmov_imm_f32_2() {
+; CHECK-LABEL: dup_fmov_imm_f32_2:
+; CHECK: mov w8, #1109917696
+; CHECK-NEXT: mov z0.s, w8
+  %out = tail call <vscale x 2 x float> @llvm.aarch64.sve.dup.x.nxv2f32(float 4.200000e+01)
+  ret <vscale x 2 x float> %out
+}
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paulwalker-arm wrote:
> Keep it if you want but this test "vscale x 2 x float" is kind of unnecessary because the intrinsics only expect to operate on/with fully packed vectors.  The fact some work with unpacked types is really a quirk due to some reusing the ISD nodes used for stock LLVM IR.
If it's not likely to not be permitted in future I'd probably rather leave it in on the basis that more tests is usually just better in my opinion. I can remove if it's something that shouldn't be allowed/might not be allowed in future though


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  https://reviews.llvm.org/D96700/new/

https://reviews.llvm.org/D96700