[PATCH] D96639: [AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn

Sat Feb 13 11:36:03 PST 2021

t-tye added a comment.

In D96639#2561629 <https://reviews.llvm.org/D96639#2561629>, @rampitec wrote:

> In D96639#2561398 <https://reviews.llvm.org/D96639#2561398>, @t-tye wrote:
>
>> In D96639#2561212 <https://reviews.llvm.org/D96639#2561212>, @rampitec wrote:
>>
>>> On top of that I do not see memory model describing atomicrmw acquire agent local combination.
>>
>> It is not present because the local address space is per workgroup and so only supports up to workgroup scope. Using any larger scope "decays" to workgroup scope.
>
> That's my understanding, but probably deserves some explanation of scope nesting in the documentation. Maybe references in the memory model to scpoes shall refer to ">= a scope"? I am just trying to play a game, an unsophisticated user came to read it. I understand why is it not written, why does a wider scope decays a narrower, but coming after a long day of bit cracking into this table stunned me for a moment. Just a personal experience, I didn't want to think, I just wanted an answer which was not readily available. I had to think where I probably shouldn't. In many cases thinking leads to unhealthy ideas where it comes to memory model. After all we test it for some reason yet don't document it.

The AMDGPU memory scopes are defined in https://llvm.org/docs/AMDGPUUsage.html#amdgpu-memory-scopes which is referenced at the beginning of the memory model section. Reading that I think addresses all the questions. That section also references the HSA and OpenCL specifications that more formally define the memory model supported by AMDGPU. I agree that thinking about memory models can be detremental to your mental health and should be avoided when working on code on Friday evening's when possible:-)

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