[PATCH] D96210: [TargetLowering][RISCV][AArch64][PowerPC] Enable BuildUDIV/BuildSDIV on illegal types before type legalization if we can find a larger legal type that supports MUL.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 11 09:44:05 PST 2021


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG5744502a137c: [TargetLowering][RISCV][AArch64][PowerPC] Enable BuildUDIV/BuildSDIV on illegal… (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96210/new/

https://reviews.llvm.org/D96210

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/BPF/BPFISelLowering.h
  llvm/test/CodeGen/AArch64/srem-seteq.ll
  llvm/test/CodeGen/AArch64/urem-seteq-nonzero.ll
  llvm/test/CodeGen/AArch64/urem-seteq.ll
  llvm/test/CodeGen/PowerPC/loop-instr-form-prepare.ll
  llvm/test/CodeGen/RISCV/div.ll
  llvm/test/CodeGen/RISCV/srem-lkk.ll
  llvm/test/CodeGen/RISCV/urem-lkk.ll

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