[llvm] 97a1cdb - [GlobalISel] Disable vector types in narrowScalarAddSub

[Cassie Jones via llvm-commits]

Author: Cassie Jones
Date: 2021-02-14T18:06:32-05:00
New Revision: 97a1cdb15618966f786404bcfcac08f52a695f55

URL: https://github.com/llvm/llvm-project/commit/97a1cdb15618966f786404bcfcac08f52a695f55
DIFF: https://github.com/llvm/llvm-project/commit/97a1cdb15618966f786404bcfcac08f52a695f55.diff

LOG: [GlobalISel] Disable vector types in narrowScalarAddSub

The implementation for vectors is broken and doesn't seem to be used by
anything. Explicitly remove support for them, they can be added again
later when they're properly implemented.

Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D95699

Added: 
    

Modified: 
    llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 6ec41c180d60..fa60913fd006 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -4447,7 +4447,13 @@ LegalizerHelper::narrowScalarAddSub(MachineInstr &MI, unsigned TypeIdx,
   if (TypeIdx != 0)
     return UnableToLegalize;
 
-  uint64_t SizeOp0 = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits();
+  Register DstReg = MI.getOperand(0).getReg();
+  LLT DstType = MRI.getType(DstReg);
+  // FIXME: add support for vector types
+  if (DstType.isVector())
+    return UnableToLegalize;
+
+  uint64_t SizeOp0 = DstType.getSizeInBits();
   uint64_t NarrowSize = NarrowTy.getSizeInBits();
 
   // FIXME: add support for when SizeOp0 isn't an exact multiple of
@@ -4492,12 +4498,7 @@ LegalizerHelper::narrowScalarAddSub(MachineInstr &MI, unsigned TypeIdx,
     DstRegs.push_back(DstReg);
     CarryIn = CarryOut;
   }
-
-  Register DstReg = MI.getOperand(0).getReg();
-  if (MRI.getType(DstReg).isVector())
-    MIRBuilder.buildBuildVector(DstReg, DstRegs);
-  else
-    MIRBuilder.buildMerge(DstReg, DstRegs);
+  MIRBuilder.buildMerge(DstReg, DstRegs);
   MI.eraseFromParent();
   return Legalized;
 }