[PATCH] D96649: [RISCV] Use XLenRI alias for RegInfoByHwMode instances

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.td:121-122
+def XLenRI : RegInfoByHwMode<
+      [RV32,              RV64],
+      [RegInfo<32,32,32>, RegInfo<64,64,64>]>;
 
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Oops, this is over-indented by 2 spaces (didn't de-indent after moving), will fix on commit.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96649/new/

https://reviews.llvm.org/D96649