[llvm] 905cf88 - [CodeGen] Use range-based for loops (NFC)

Kazu Hirata via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 12 23:45:15 PST 2021


Author: Kazu Hirata
Date: 2021-02-12T23:44:33-08:00
New Revision: 905cf88d1877fc080f30fe684dda6743bc83f555

URL: https://github.com/llvm/llvm-project/commit/905cf88d1877fc080f30fe684dda6743bc83f555
DIFF: https://github.com/llvm/llvm-project/commit/905cf88d1877fc080f30fe684dda6743bc83f555.diff

LOG: [CodeGen] Use range-based for loops (NFC)

Added: 
    

Modified: 
    llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
    llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
    llvm/lib/CodeGen/EdgeBundles.cpp
    llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
    llvm/lib/CodeGen/GCRootLowering.cpp
    llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
    llvm/lib/CodeGen/HardwareLoops.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp b/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
index 7ae42b010261..c56c8c87734f 100644
--- a/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
+++ b/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
@@ -65,9 +65,8 @@ void CriticalAntiDepBreaker::StartBlock(MachineBasicBlock *BB) {
   bool IsReturnBlock = BB->isReturnBlock();
 
   // Examine the live-in regs of all successors.
-  for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(),
-         SE = BB->succ_end(); SI != SE; ++SI)
-    for (const auto &LI : (*SI)->liveins()) {
+  for (const MachineBasicBlock *Succ : BB->successors())
+    for (const auto &LI : Succ->liveins()) {
       for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI) {
         unsigned Reg = *AI;
         Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1);
@@ -143,17 +142,16 @@ static const SDep *CriticalPathStep(const SUnit *SU) {
   const SDep *Next = nullptr;
   unsigned NextDepth = 0;
   // Find the predecessor edge with the greatest depth.
-  for (SUnit::const_pred_iterator P = SU->Preds.begin(), PE = SU->Preds.end();
-       P != PE; ++P) {
-    const SUnit *PredSU = P->getSUnit();
-    unsigned PredLatency = P->getLatency();
+  for (const SDep &P : SU->Preds) {
+    const SUnit *PredSU = P.getSUnit();
+    unsigned PredLatency = P.getLatency();
     unsigned PredTotalLatency = PredSU->getDepth() + PredLatency;
     // In the case of a latency tie, prefer an anti-dependency edge over
     // other types of edges.
     if (NextDepth < PredTotalLatency ||
-        (NextDepth == PredTotalLatency && P->getKind() == SDep::Anti)) {
+        (NextDepth == PredTotalLatency && P.getKind() == SDep::Anti)) {
       NextDepth = PredTotalLatency;
-      Next = &*P;
+      Next = &P;
     }
   }
   return Next;
@@ -426,9 +424,8 @@ findSuitableFreeRegister(RegRefIter RegRefBegin,
       continue;
     // If NewReg overlaps any of the forbidden registers, we can't use it.
     bool Forbidden = false;
-    for (SmallVectorImpl<unsigned>::iterator it = Forbid.begin(),
-           ite = Forbid.end(); it != ite; ++it)
-      if (TRI->regsOverlap(NewReg, *it)) {
+    for (unsigned R : Forbid)
+      if (TRI->regsOverlap(NewReg, R)) {
         Forbidden = true;
         break;
       }
@@ -582,11 +579,11 @@ BreakAntiDependencies(const std::vector<SUnit> &SUnits,
             // Also, if there are dependencies on other SUnits with the
             // same register as the anti-dependency, don't attempt to
             // break it.
-            for (SUnit::const_pred_iterator P = CriticalPathSU->Preds.begin(),
-                 PE = CriticalPathSU->Preds.end(); P != PE; ++P)
-              if (P->getSUnit() == NextSU ?
-                    (P->getKind() != SDep::Anti || P->getReg() != AntiDepReg) :
-                    (P->getKind() == SDep::Data && P->getReg() == AntiDepReg)) {
+            for (const SDep &P : CriticalPathSU->Preds)
+              if (P.getSUnit() == NextSU
+                      ? (P.getKind() != SDep::Anti || P.getReg() != AntiDepReg)
+                      : (P.getKind() == SDep::Data &&
+                         P.getReg() == AntiDepReg)) {
                 AntiDepReg = 0;
                 break;
               }

diff  --git a/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp b/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
index 93467e9d09b8..6e7db95b5c2a 100644
--- a/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
+++ b/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
@@ -132,10 +132,8 @@ bool DeadMachineInstructionElim::eliminateDeadMI(MachineFunction &MF) {
     // Add live-ins from successors to LivePhysRegs. Normally, physregs are not
     // live across blocks, but some targets (x86) can have flags live out of a
     // block.
-    for (MachineBasicBlock::succ_iterator S = MBB->succ_begin(),
-                                          E = MBB->succ_end();
-         S != E; S++)
-      for (const auto &LI : (*S)->liveins())
+    for (const MachineBasicBlock *Succ : MBB->successors())
+      for (const auto &LI : Succ->liveins())
         LivePhysRegs.set(LI.PhysReg);
 
     // Now scan the instructions and delete dead ones, tracking physreg

diff  --git a/llvm/lib/CodeGen/EdgeBundles.cpp b/llvm/lib/CodeGen/EdgeBundles.cpp
index 0b2ffda50a39..67922e93a525 100644
--- a/llvm/lib/CodeGen/EdgeBundles.cpp
+++ b/llvm/lib/CodeGen/EdgeBundles.cpp
@@ -46,9 +46,8 @@ bool EdgeBundles::runOnMachineFunction(MachineFunction &mf) {
   for (const auto &MBB : *MF) {
     unsigned OutE = 2 * MBB.getNumber() + 1;
     // Join the outgoing bundle with the ingoing bundles of all successors.
-    for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(),
-           SE = MBB.succ_end(); SI != SE; ++SI)
-      EC.join(OutE, 2 * (*SI)->getNumber());
+    for (const MachineBasicBlock *Succ : MBB.successors())
+      EC.join(OutE, 2 * Succ->getNumber());
   }
   EC.compress();
   if (ViewEdgeBundles)
@@ -86,10 +85,9 @@ raw_ostream &WriteGraph<>(raw_ostream &O, const EdgeBundles &G,
       << "\"\n"
       << "\t\"" << printMBBReference(MBB) << "\" -> " << G.getBundle(BB, true)
       << '\n';
-    for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(),
-           SE = MBB.succ_end(); SI != SE; ++SI)
+    for (const MachineBasicBlock *Succ : MBB.successors())
       O << "\t\"" << printMBBReference(MBB) << "\" -> \""
-        << printMBBReference(**SI) << "\" [ color=lightgray ]\n";
+        << printMBBReference(*Succ) << "\" [ color=lightgray ]\n";
   }
   O << "}\n";
   return O;

diff  --git a/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp b/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
index 842211c09134..d909d6aa5b0a 100644
--- a/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
+++ b/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
@@ -188,9 +188,8 @@ bool ExpandPostRA::runOnMachineFunction(MachineFunction &MF) {
 
   bool MadeChange = false;
 
-  for (MachineFunction::iterator mbbi = MF.begin(), mbbe = MF.end();
-       mbbi != mbbe; ++mbbi) {
-    for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi->end();
+  for (MachineBasicBlock &MBB : MF) {
+    for (MachineBasicBlock::iterator mi = MBB.begin(), me = MBB.end();
          mi != me;) {
       MachineInstr &MI = *mi;
       // Advance iterator here because MI may be erased.

diff  --git a/llvm/lib/CodeGen/GCRootLowering.cpp b/llvm/lib/CodeGen/GCRootLowering.cpp
index e2ee0c97f94d..ead34be9ea23 100644
--- a/llvm/lib/CodeGen/GCRootLowering.cpp
+++ b/llvm/lib/CodeGen/GCRootLowering.cpp
@@ -105,9 +105,9 @@ void LowerIntrinsics::getAnalysisUsage(AnalysisUsage &AU) const {
 bool LowerIntrinsics::doInitialization(Module &M) {
   GCModuleInfo *MI = getAnalysisIfAvailable<GCModuleInfo>();
   assert(MI && "LowerIntrinsics didn't require GCModuleInfo!?");
-  for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I)
-    if (!I->isDeclaration() && I->hasGC())
-      MI->getFunctionInfo(*I); // Instantiate the GC strategy.
+  for (Function &F : M)
+    if (!F.isDeclaration() && F.hasGC())
+      MI->getFunctionInfo(F); // Instantiate the GC strategy.
 
   return false;
 }

diff  --git a/llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp b/llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
index 2fa208fbfaaf..3012a42d4177 100644
--- a/llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
@@ -278,8 +278,7 @@ Error GISelCSEInfo::verify() {
 
   // For every node in the CSEMap, make sure that the InstrMapping
   // points to it.
-  for (auto It = CSEMap.begin(), End = CSEMap.end(); It != End; ++It) {
-    const UniqueMachineInstr &UMI = *It;
+  for (const UniqueMachineInstr &UMI : CSEMap) {
     if (!InstrMapping.count(UMI.MI))
       return createStringError(std::errc::not_supported,
                                "Node in CSE without InstrMapping", UMI.MI);

diff  --git a/llvm/lib/CodeGen/HardwareLoops.cpp b/llvm/lib/CodeGen/HardwareLoops.cpp
index 810b10c9c82a..61392186f7cd 100644
--- a/llvm/lib/CodeGen/HardwareLoops.cpp
+++ b/llvm/lib/CodeGen/HardwareLoops.cpp
@@ -232,11 +232,9 @@ bool HardwareLoops::runOnFunction(Function &F) {
   AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
   M = F.getParent();
 
-  for (LoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I) {
-    Loop *L = *I;
+  for (Loop *L : *LI)
     if (L->isOutermost())
       TryConvertLoop(L);
-  }
 
   return MadeChange;
 }


        


More information about the llvm-commits mailing list