[PATCH] D96622: [DAG] PromoteIntRes_ADDSUBSHLSAT - use promoted ISD::USUBSAT directly
Nikita Popov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 12 11:41:06 PST 2021
nikic accepted this revision.
nikic added a comment.
This revision is now accepted and ready to land.
LGTM
> I think something similar should be possible for ISD::UADDSAT as well, which I'll look at later.
This works for usubsat because the lower bound stays the same (0), while for uaddsat it would change (from 2^bw-1 to 2^new_bw-1). So not sure a similar pattern is possible for that case.
> https://alive2.llvm.org/ce/
I think you posted the wrong link there :)
================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:808
+ APInt::getBitsSetFrom(NewBits, OldBits)) &&
+ "Promoted USUBSAT args should be zero-extended");
+ return DAG.getNode(ISD::USUBSAT, dl, PromotedType, Op1Promoted,
----------------
Personally, I'd drop this assert. The zext is explicitly done up above, and doing a known bits query for this seems weird to me.
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https://reviews.llvm.org/D96622/new/
https://reviews.llvm.org/D96622
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