[llvm] b6ccc76 - [Test] Add test with uadd intrinsic with missing opt opportunity

[Max Kazantsev via llvm-commits]

Author: Max Kazantsev
Date: 2021-02-12T17:46:32+07:00
New Revision: b6ccc7675d5040af75ab290bb193ba7ba820d49d

URL: https://github.com/llvm/llvm-project/commit/b6ccc7675d5040af75ab290bb193ba7ba820d49d
DIFF: https://github.com/llvm/llvm-project/commit/b6ccc7675d5040af75ab290bb193ba7ba820d49d.diff

LOG: [Test] Add test with uadd intrinsic with missing opt opportunity

Added: 
    llvm/test/CodeGen/X86/uadd_inc_iv.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/uadd_inc_iv.ll b/llvm/test/CodeGen/X86/uadd_inc_iv.ll
new file mode 100644
index 000000000000..6cc88d8501c8
--- /dev/null
+++ b/llvm/test/CodeGen/X86/uadd_inc_iv.ll
@@ -0,0 +1,55 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -mtriple=x86_64-linux -codegenprepare -S < %s | FileCheck %s
+
+declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64)
+
+define i32 @test_01(i32* %p, i64 %len, i32 %x) {
+; CHECK-LABEL: @test_01(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ [[MATH:%.*]], [[BACKEDGE:%.*]] ], [ [[LEN:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[TMP0:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[IV]], i64 1)
+; CHECK-NEXT:    [[MATH]] = extractvalue { i64, i1 } [[TMP0]], 0
+; CHECK-NEXT:    [[OV:%.*]] = extractvalue { i64, i1 } [[TMP0]], 1
+; CHECK-NEXT:    br i1 [[OV]], label [[EXIT:%.*]], label [[BACKEDGE]]
+; CHECK:       backedge:
+; CHECK-NEXT:    [[SUNKADDR:%.*]] = mul i64 [[IV]], 4
+; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[P:%.*]] to i8*
+; CHECK-NEXT:    [[SUNKADDR1:%.*]] = getelementptr i8, i8* [[TMP1]], i64 [[SUNKADDR]]
+; CHECK-NEXT:    [[SUNKADDR2:%.*]] = getelementptr i8, i8* [[SUNKADDR1]], i64 4
+; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i8* [[SUNKADDR2]] to i32*
+; CHECK-NEXT:    [[LOADED:%.*]] = load atomic i32, i32* [[TMP2]] unordered, align 4
+; CHECK-NEXT:    [[COND_2:%.*]] = icmp eq i32 [[LOADED]], [[X:%.*]]
+; CHECK-NEXT:    br i1 [[COND_2]], label [[FAILURE:%.*]], label [[LOOP]]
+; CHECK:       exit:
+; CHECK-NEXT:    ret i32 -1
+; CHECK:       failure:
+; CHECK-NEXT:    unreachable
+;
+entry:
+  br label %loop
+
+loop:                                             ; preds = %backedge, %entry
+  %iv = phi i64 [ %math, %backedge ], [ %len, %entry ]
+  %0 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %iv, i64 1)
+  %math = extractvalue { i64, i1 } %0, 0
+  %ov = extractvalue { i64, i1 } %0, 1
+  br i1 %ov, label %exit, label %backedge
+
+backedge:                                         ; preds = %loop
+  %sunkaddr = mul i64 %iv, 4
+  %1 = bitcast i32* %p to i8*
+  %sunkaddr1 = getelementptr i8, i8* %1, i64 %sunkaddr
+  %sunkaddr2 = getelementptr i8, i8* %sunkaddr1, i64 4
+  %2 = bitcast i8* %sunkaddr2 to i32*
+  %loaded = load atomic i32, i32* %2 unordered, align 4
+  %cond_2 = icmp eq i32 %loaded, %x
+  br i1 %cond_2, label %failure, label %loop
+
+exit:                                             ; preds = %loop
+  ret i32 -1
+
+failure:                                          ; preds = %backedge
+  unreachable
+}