[PATCH] D96421: [AMDGPU] Better selection of base offset when merging DS reads/writes

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp:802
   // Try to shift base address to decrease offsets.
-  unsigned OffsetDiff = std::abs((int)EltOffset1 - (int)EltOffset0);
-  CI.BaseOff = std::min(CI.Offset, Paired.Offset);
+  unsigned Min = std::min(EltOffset0, EltOffset1);
+  unsigned Max = std::max(EltOffset0, EltOffset1);
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foad wrote:
> arsenm wrote:
> > Should probably use uint32_t throughout here
> I'd prefer not to, since the rest of the file is pretty consistent in using `unsigned` throughout.
LLVM is pretty consistently wrong in using unsigned for 32-bit values when it's not guaranteed by the standard


Repository:
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  https://reviews.llvm.org/D96421/new/

https://reviews.llvm.org/D96421