[PATCH] D91972: Improve STRICT_FSETCC codegen in absence of no NaN
Sjoerd Meijer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 11 05:14:14 PST 2021
SjoerdMeijer added a comment.
In D91972#2551345 <https://reviews.llvm.org/D91972#2551345>, @thopre wrote:
> In D91972#2551343 <https://reviews.llvm.org/D91972#2551343>, @thopre wrote:
>
>> Remove f16 tests which is not yet supported by AArch64 backend: https://reviews.llvm.org/source/llvm-github/browse/main/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp$2277
>
> @SjoerdMeijer Ok to commit without f16 tests given the above? I've tested in debug mode and thus assertion on this time and that passes without issue (fails in that mode with f16 cases)
Ah, ok, sure.
Bonus points for following up to fix the f16 case then. ;-)
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D91972/new/
https://reviews.llvm.org/D91972
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