[PATCH] D96381: [AArch64] Adding SHA3 Intrinsics support

[Ana Pazos via Phabricator via llvm-commits]

apazos added inline comments.


================
Comment at: clang/utils/TableGen/NeonEmitter.cpp:2118
     Record *R = Def->getRecord();
-    if (R->getValueAsBit("isVCVT_N")) {
+    if (R->getValueAsBit("isVXAR")) {
+      //VXAR takes an immediate in the range [0, 63]
----------------
Consider alphabetizing the check. move isVXAR check after isVCT_N


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96381/new/

https://reviews.llvm.org/D96381