[PATCH] D95094: [ShrinkWrap] Enable Shrinkwrapping on 32 and 64 bit AIX, and 64 bit ELF

Sean Fertile via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 10 08:20:49 PST 2021


sfertile added inline comments.


================
Comment at: llvm/test/CodeGen/PowerPC/shrink-wrap.ll:2
 ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 | FileCheck  %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec | FileCheck  %s -check-prefix=AIX -check-prefix=32AIX 
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec | FileCheck  %s -check-prefix=AIX -check-prefix=64AIX
----------------
When there are more then one check-prefix, then we use ` --check-prefixes=AIX,32AIX` instead of using '-check-prefix' multiple times.


================
Comment at: llvm/test/CodeGen/PowerPC/shrink-wrap.ll:2
 ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 | FileCheck  %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec | FileCheck  %s -check-prefix=AIX -check-prefix=32AIX 
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec | FileCheck  %s -check-prefix=AIX -check-prefix=64AIX
----------------
sfertile wrote:
> When there are more then one check-prefix, then we use ` --check-prefixes=AIX,32AIX` instead of using '-check-prefix' multiple times.
Both the new run lines have trailing whitespace.


================
Comment at: llvm/test/CodeGen/PowerPC/shrink-wrap.ll:56
+
+; Aix Specfic Checks
+; AIX-LABEL: .shrinkwrapme
----------------
Looking at this test we don't really need to worry about the differences between the codegen specific to Aix vs Linux. The important part of the test is showing that we don't shrink-wrap into a basic-block that is executed significantly more then the entry and exit blocks (IIUC). We can use regex to remove the difference between the labels, and skip some of the instructions which aren't critical to the test, and end up using all the same checks for Linux and 64-bit AIX, then a couple different checks for 32-bit codegen.

```
; CHECK-LABEL: {{[\.]?}}shrinkwrapme:
; CHECK:       # %bb.0:
; CHECK-NEXT:    cmpwi
; Prolog code
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std
; CHECK64:         std

; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw
; CHECK32:         stw

; CHECK:         blt 0, {{.*}}BB0_3
; CHECK:       # %bb.1:
; CHECK:         li
; CHECK:       {{.*}}BB0_2:
; CHECK:         add
; CHECK:         bdnz {{.*}}BB0_2
; CHECK-NEXT:    b {{.*}}BB0_4
; CHECK:       {{.*}}BB0_3:
; CHECK-NEXT:    li
; CHECK:       {{.*}}BB0_4:

; Epilog code
; CHECK64-DAG:         extsw
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld
; CHECK64-DAG:         ld

; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz
; CHECK32:         lwz

; CHECK:         blr
```

We can even skip the `extsw` instruction in the 64-bit prologue and simplify by removing the 'DAG' checks.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95094/new/

https://reviews.llvm.org/D95094



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