[PATCH] D91972: Improve STRICT_FSETCC codegen in absence of no NaN

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/arm64-constrained-fcmp-no-nans-opt.ll:3
+
+declare i1 @llvm.experimental.constrained.fcmp.f32(float, float, metadata, metadata)
+
----------------
SjoerdMeijer wrote:
> thopre wrote:
> > SjoerdMeijer wrote:
> > > Do we need to add tests for .f16 and .f64 just for completeness?  
> > I've only done the f64 because f16 does not appear to be supported on AArch64:
> > 
> > 
> > ```
> > LLVM ERROR: Cannot select: 0x55d983a0fc58: f16,ch = AArch64ISD::STRICT_FCMP 0x55d9839a8938, 0x55d983a0fab8, 0x55d983a0fb88
> >   0x55d983a0fab8: f16,ch = CopyFromReg 0x55d9839a8938, Register:f16 %0
> >     0x55d983a0fa50: f16 = Register %0
> >   0x55d983a0fb88: f16,ch = CopyFromReg 0x55d9839a8938, Register:f16 %1
> >     0x55d983a0fb20: f16 = Register %1
> > In function: f16_constrained_fcmp_ueq
> > ```
> > 
> > Happy to add it later if someone adds that support.
> It is supported if you add `-mattr=+fullfp16` to the command line.
And without it, it shouldn't crash, so that is a problem, but perhaps a different one.


Repository:
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  https://reviews.llvm.org/D91972/new/

https://reviews.llvm.org/D91972