[PATCH] D96309: [AMDGPU] Refactor MIMG tables to better handle hardware variants

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 9 02:02:42 PST 2021


foad added a comment.

Looks good to me, but there are also some TODOs in test/MC/Disassembler/AMDGPU/gfx10_mimg.txt which you should be able TO DO now.



================
Comment at: llvm/lib/Target/AMDGPU/MIMGInstructions.td:835
+defm IMAGE_ATOMIC_SUB           : MIMG_Atomic <mimgopc<0x12, 0x13, 0x12>, "image_atomic_sub">;
+defm IMAGE_ATOMIC_RSUB          : MIMG_Atomic <mimgopc<MIMG.NOP, MIMG.NOP, 0x13>, "image_atomic_rsub">;
+defm IMAGE_ATOMIC_SMIN          : MIMG_Atomic <mimgopc<0x14>, "image_atomic_smin">;
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Needs asm/dis tests?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D96309/new/

https://reviews.llvm.org/D96309



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