[PATCH] D96013: GlobalISel: Try to combine G_[SU]DIV and G_[SU]REM

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas added a comment.

I am making it a generic pattern that comes from the Combine.td. Will update the patch soon.



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Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:955
+  Register Src2 = MI.getOperand(2).getReg();
+  unsigned DivOpcode = IsSigned ? TargetOpcode::G_SDIV : TargetOpcode::G_UDIV;
+  unsigned RemOpcode = IsSigned ? TargetOpcode::G_SREM : TargetOpcode::G_UREM;
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paquette wrote:
> Why not use `Opcode`? If it's a div, then `Opcode` == `DivOpcode`. If it's a rem, then `Opcode == RemOpcode`.
Based on the signness of MI, here I am trying to get the other opcode to match.
And the check below matches the (sdiv, srem) or (udiv, urem) pair irrespective of their position.


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https://reviews.llvm.org/D96013