[PATCH] D96206: [X86] Fold bitcast(logic(bitcast(X), Y)) --> logic'(X, bitcast(Y)) for int-int bitcasts

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: spatel, craig.topper, pengfei.
Herald added subscribers: steven.zhang, hiraditya.
RKSimon requested review of this revision.
Herald added a project: LLVM.

Extend the existing combine that handles bitcasting for fp-logic ops to also help remove logic ops across bitcasts to/from the same integer types.

This helps improve AVX512 predicate handling for D/Q logic ops and also allows DAGCombine's scalarizeExtractedBinop to remove some annoying gpr->simd->gpr transfers.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D96206

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/avx512-logic.ll
  llvm/test/CodeGen/X86/known-signbits-vector.ll
  llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll
  llvm/test/CodeGen/X86/memcmp-optsize.ll
  llvm/test/CodeGen/X86/memcmp-pgso.ll
  llvm/test/CodeGen/X86/memcmp.ll
  llvm/test/CodeGen/X86/merge-consecutive-loads-512.ll
  llvm/test/CodeGen/X86/pr40891.ll
  llvm/test/CodeGen/X86/sse2.ll
  llvm/test/CodeGen/X86/vec_saddo.ll
  llvm/test/CodeGen/X86/vec_ssubo.ll
  llvm/test/CodeGen/X86/vector-idiv-v2i32.ll
  llvm/test/CodeGen/X86/vector-reduce-and-cmp.ll
  llvm/test/CodeGen/X86/vector-reduce-and.ll
  llvm/test/CodeGen/X86/vector-reduce-or.ll
  llvm/test/CodeGen/X86/vector-reduce-xor.ll
  llvm/test/CodeGen/X86/vector-trunc-packus.ll
  llvm/test/CodeGen/X86/widen_cast-5.ll
  llvm/test/CodeGen/X86/xor.ll

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