[PATCH] D96119: [Codegenprepare][X86] Use usub with overflow opt for IV increment
Max Kazantsev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 5 04:16:44 PST 2021
mkazantsev created this revision.
mkazantsev added reviewers: spatel, aqjune, reames, craig.topper.
Herald added subscribers: pengfei, jfb, hiraditya.
mkazantsev requested review of this revision.
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Function `replaceMathCmpWithIntrinsic` artificially limits the scope
of the optimization, setting a requirement of two instructions be in
the same block, due to two reasons:
- usage of DT for more general check is costly in terms of compile time;
- risk of creating a new value that lives through multiple blocks.
Because of this, two semantically equivalent tests may be or not be the
subject of this opt depending on where the binary operation is located.
See `test/CodeGen/X86/usub_inc_iv.ll` for motivation
There is one important particular case where this limitation is too strict:
it is when the binary operation is the increment of the induction variable.
As result, the application of this opt becomes fragile and highly reliant on
where other passes decide to place IV increment. In most cases, they place
it in the end of the latch block, killing the opt opportunity (when in fact it
does not matter where to insert the actual instruction).
This patch handles this particular case separately.
- The detector does not use dom tree and has constant cost;
- The value of IV or IV.next lives through all loop in any case, so this should not create a new unexpected long-living value.
As result, the transform becomes more robust. It also seems to lead to
better code generation in some cases (see `test/CodeGen/X86/lsr-loop-exit-cond.ll`).
https://reviews.llvm.org/D96119
Files:
llvm/lib/CodeGen/CodeGenPrepare.cpp
llvm/test/CodeGen/X86/2020_12_02_decrementing_loop.ll
llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll
llvm/test/CodeGen/X86/usub_inc_iv.ll
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