[PATCH] D96028: [RISCV] Add patterns for scalable-vector fabs & fcopysign

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 5 02:55:26 PST 2021


frasercrmck added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1628
+
+  // Return a custom node to prevent infinite DAGCombien loops
+  return DAG.getNode(RISCVISD::VFCOPYSIGN, DL, VT, Op.getOperand(0), In2);
----------------
craig.topper wrote:
> DAGCombien->DAGCombine
Cheers


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1629
+  // Return a custom node to prevent infinite DAGCombien loops
+  return DAG.getNode(RISCVISD::VFCOPYSIGN, DL, VT, Op.getOperand(0), In2);
+}
----------------
craig.topper wrote:
> Should this use the VFSGNJX name?
Yeah that makes sense.


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Comment at: llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll:358
+define <vscale x 8 x half> @vfcopynsign_exttrunc_vv_nxv8f16_nxv8f32(<vscale x 8 x half> %vm, <vscale x 8 x float> %vs) {
+; CHECK-LABEL: vfcopynsign_exttrunc_vv_nxv8f16_nxv8f32:
+; CHECK:       # %bb.0:
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If I'm not mistaken, we should be able to improve the codegen of this example by reordering the fptrunc and fneg and folding the copysign+fneg to vfsgnjn?


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  https://reviews.llvm.org/D96028/new/

https://reviews.llvm.org/D96028



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