[PATCH] D95800: [RISCV] Make scalable vector FMA commutable for register allocation.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 321666.
craig.topper added a comment.

Fix typo minued->minuend


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95800/new/

https://reviews.llvm.org/D95800

Files:
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrFormats.td
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmadd-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmsub-sdnode.ll

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