[PATCH] D95964: [AMDGPU] Add f16 to i1 CodeGen patterns.
Wen-Heng (Jack) Chung via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 4 10:19:33 PST 2021
whchung added inline comments.
================
Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir:117-122
+ ; GCN-LABEL: name: fptoui_s16_to_s1_vv
+ ; GCN: liveins: $vgpr0
+ ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; GCN: %4:vgpr_32 = nofpexcept V_CVT_F32_F16_e32 [[COPY]], implicit $mode, implicit $exec
+ ; GCN: %2:vgpr_32 = nofpexcept V_CVT_U32_F32_e32 %4, implicit $mode, implicit $exec
+ ; GCN: S_ENDPGM 0, implicit %2
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arsenm wrote:
> This isn't testing a target with f16 instructions
@arsenm Could you help review if https://reviews.llvm.org/D96061 addresses your concerns? Thanks.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95964/new/
https://reviews.llvm.org/D95964
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