[PATCH] D96048: [AMDGPU][GlobalISel] Fix v2s16 right shifts

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
foad added reviewers: arsenm, Petar.Avramovic, mbrkusanin.
Herald added subscribers: kerbowa, hiraditya, t-tye, tpr, dstuttard, rovka, yaxunl, nhaehnle, jvesely, kzhuravl.
foad requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

When widening, each half of the v2s16 operands needs to be sign extended
for G_ASHR or zero extended for G_LSHR.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D96048

Files:
  llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ashr.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-lshr.mir

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