[PATCH] D96015: [RegAllocFast] Handle case where operand of copy cannot be assigned.

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 4 05:51:44 PST 2021


arsenm added a comment.

My first thoughts is there should be no scan or instruction moving necessary. Why can't you just spill registers to satisfy this? The MIR test would help understand this



================
Comment at: llvm/lib/CodeGen/RegAllocFast.cpp:1083-1086
+  // Check for copies with a VReg use in a reg-class with all registers
+  // pre-assigned. In that case, hoist the instruction up to the definition of
+  // the VReg in the hope that some pre-assigned registers have been freed up.
+  if (MI.isCopy()) {
----------------
I don't see why copies specifically would be special for this problem


================
Comment at: llvm/lib/CodeGen/RegAllocFast.cpp:1089
+    MachineOperand &Op1 = MI.getOperand(1);
+    if (Op0.isReg() && Op0.getReg().isPhysical() && Op1.isReg() &&
+        Op1.getReg().isVirtual()) {
----------------
 Both operands are required to be a register for COPY, you can drop the isReg checks


================
Comment at: llvm/lib/CodeGen/RegAllocFast.cpp:1094-1101
+      if (all_of(AllocationOrder, [&](MCPhysReg PhysReg) {
+            for (MCRegUnitIterator UI(PhysReg, TRI); UI.isValid(); ++UI) {
+              if (RegUnitStates[*UI] == regPreAssigned) {
+                return true;
+              }
+            }
+            return false;
----------------
Moving this to a separate function would be worthwhile


================
Comment at: llvm/lib/CodeGen/RegAllocFast.cpp:1103-1113
+        // If we find the definition of Reg, move MI just after it and exit
+        // the function.
+        for (auto &MI2 : reverse(make_range(
+                 MI.getParent()->begin()->getIterator(), MI.getIterator()))) {
+          bool DefinesReg = MI2.getOperand(0).isReg() &&
+                            MI2.getOperand(0).isDef() &&
+                            MI2.getOperand(0).getReg() == Reg;
----------------
What about partial defs?


================
Comment at: llvm/test/CodeGen/X86/regallocfast-need-to-move-copy.ll:3
+; RUN: llc -o - -O0 -verify-machineinstrs %s | FileCheck %s
+
+target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
----------------
Should add a comment explaining the test


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https://reviews.llvm.org/D96015



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