[PATCH] D95891: [ARM] Do not emit ldrexd/strexd on Cortex-M chips

[Ayke via Phabricator via llvm-commits]

aykevl added a comment.

Thanks for the review! I've updated the patch accordingly.



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Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:18761
   // can never succeed. So at -O0 we need a late-expanded pseudo-inst instead.
+  unsigned Size = AI->getOperand(1)->getType()->getPrimitiveSizeInBits();
   bool HasAtomicCmpXchg =
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SjoerdMeijer wrote:
> I think this could benefit from a comment saying that this is a special case for LDREXD and STREXD as they are not available in v7-m and v8-m.
I've added a comment. The situation is really the same as for `shouldExpandAtomicRMWInIR` etc.


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Comment at: llvm/test/CodeGen/ARM/atomic-64bit.ll:5
 ; RUN: llc < %s -mtriple=thumbebv7-none-linux-gnueabihf | FileCheck %s --check-prefix=CHECK-THUMB --check-prefix=CHECK-THUMB-BE
+; RUN: llc < %s -mtriple=armv7m--none-eabi | FileCheck %s --check-prefix=CHECK-ARMV7M
 
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SjoerdMeijer wrote:
> Can you add an armv8m RUN line too?
Sure, done. As far as I can see, it's the same for armv7m as for armv8m: they both only support 32-bit (4 byte) atomic operations. Not entirely sure about the check prefix but it's for the Cortex-M profile and others are similarly short.


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https://reviews.llvm.org/D95891