[llvm] 916c412 - [LoopVectorize] add test for fake min/max; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2021-02-03T09:24:57-05:00
New Revision: 916c4121c10bc39b51754c3ac2483317568a4856

URL: https://github.com/llvm/llvm-project/commit/916c4121c10bc39b51754c3ac2483317568a4856
DIFF: https://github.com/llvm/llvm-project/commit/916c4121c10bc39b51754c3ac2483317568a4856.diff

LOG: [LoopVectorize] add test for fake min/max; NFC

This goes with the dyn_cast fix:
0fa61304d247a61

That was made after noticing that the assert was over-reaching here:
bbed5f2f8a ( D95690 )

Added: 
    

Modified: 
    llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll b/llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
index 3dcca2fb30a3..ea1a8c994835 100644
--- a/llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
+++ b/llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
@@ -154,4 +154,33 @@ out:                                              ; preds = %loop
   ret float %t6
 }
 
+; This would assert on FMF propagation.
+
+define void @not_a_min_max() {
+; CHECK-LABEL: @not_a_min_max(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[F9_S0_V0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[T14:%.*]] = icmp eq i32 [[F9_S0_V0]], 5
+; CHECK-NEXT:    [[T15:%.*]] = select reassoc nnan ninf nsz contract afn i1 [[T14]], float 0x36A0000000000000, float 0.000000e+00
+; CHECK-NEXT:    [[ADD]] = add nuw nsw i32 [[F9_S0_V0]], 1
+; CHECK-NEXT:    br i1 false, label [[END:%.*]], label [[LOOP]]
+; CHECK:       end:
+; CHECK-NEXT:    ret void
+;
+entry:
+  br label %loop
+
+loop:
+  %f9.s0.v0 = phi i32 [ 0, %entry ], [ %add, %loop ]
+  %t14 = icmp eq i32 %f9.s0.v0, 5
+  %t15 = select reassoc nnan ninf nsz contract afn i1 %t14, float 0x36A0000000000000, float 0.0
+  %add = add nuw nsw i32 %f9.s0.v0, 1
+  br i1 false, label %end, label %loop
+
+end:
+  ret void
+}
+
 attributes #0 = { "no-nans-fp-math"="true" }