[PATCH] D95781: [RISCV] Add new vector instructions in v0.10.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 2 19:24:17 PST 2021
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp:226
+ if (MBBI->getOpcode() == RISCV::PseudoVSETVLI)
+ Desc = &TII->get(RISCV::VSETVLI);
+ else
----------------
Might be better to just select the opcode here and put the TTI->get call into the BuildMI below?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95781/new/
https://reviews.llvm.org/D95781
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