[llvm] b0869a7 - [PowerPC] [NFC] fix wording typos

[Chen Zheng via llvm-commits]

Author: Chen Zheng
Date: 2021-02-02T21:03:17-05:00
New Revision: b0869a7d72f121b77d48d6496c6c3f00dd4731da

URL: https://github.com/llvm/llvm-project/commit/b0869a7d72f121b77d48d6496c6c3f00dd4731da
DIFF: https://github.com/llvm/llvm-project/commit/b0869a7d72f121b77d48d6496c6c3f00dd4731da.diff

LOG: [PowerPC] [NFC] fix wording typos

Post commit comments address for D92071.

Added: 
    

Modified: 
    llvm/lib/Target/PowerPC/PPCInstrInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 743be282c00d..7d2bd7c6947d 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -344,7 +344,7 @@ int16_t PPCInstrInfo::getFMAOpIdxInfo(unsigned Opcode) const {
 //
 // 2: Reduce register pressure.
 // Try to reassociate FMA with FSUB and a constant like below:
-// C is a floatint point const.
+// C is a floating point const.
 //
 // Pattern 1:
 //   A = FSUB  X,  Y      (Leaf)
@@ -362,7 +362,7 @@ int16_t PPCInstrInfo::getFMAOpIdxInfo(unsigned Opcode) const {
 //
 //  Before the transformation, A must be assigned with 
diff erent hardware
 //  register with D. After the transformation, A and D must be assigned with
-//  same hardware register due to TIE attricute of FMA instructions.
+//  same hardware register due to TIE attribute of FMA instructions.
 //
 bool PPCInstrInfo::getFMAPatterns(
     MachineInstr &Root, SmallVectorImpl<MachineCombinerPattern> &Patterns,