[PATCH] D95781: [RISCV] Add new vector instructions in v0.10.

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVCleanupVSETVLI.cpp:62
 
+    // FIXME: Consider PseudoVSETIVLI.
     if (MI.getOpcode() != RISCV::PseudoVSETVLI) {
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Is this currently safe, or is it a FIXME to enable additional optimizations? It might be reassuring to have some tests which show `vsetvli` and `vsetivli` behave correctly together.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95781/new/

https://reviews.llvm.org/D95781